MT9M034

www.onsemi.com

3

User interaction with the sensor is through the two−wire

serial bus, which communicates with the array control,

analog signal chain, and digital signal chain. The core of the

sensor is a 1.2 Mp Active− Pixel Sensor array. The timing

and control circuitry sequences through the rows of the

array, resetting and then reading each row in turn. In the time

interval between resetting a row and reading that row, the

pixels in the row integrate incident light. The exposure is

controlled by varying the time interval between reset and

readout. Once a row has been read, the data from the

columns is sequenced through an analog signal chain

(providing offset correction and gain), and then through an

analog−to−digital converter (ADC). The output from the

ADC is a 12−bit value for each pixel in the array. The ADC

output passes through a digital processing signal chain

(which provides further data path corrections and applies

digital gain). The sensor also offers a high dynamic range

mode of operation where multiple images are combined

on−chip to produce a single image at 20−bit per pixel value.

A compressing mode is further offered to allow this 20−bit

pixel value to be transmitted to the host system as a 12−bit

value with close to zero loss in image quality. The pixel data

are output at a rate of up to 74.25 Mp/s, in parallel to frame

and line synchronization signals.

Figure 2. Typical Configuration: Parallel Pixel Data Interface

Notes:

Master clock

(6–50 MHz)

SCLK

RESET_BAR

TEST

FRAME_VALID

EXTCLK

Digital

ground

Analog

ground

To

Controller

LINE_VALID

PIXCLK

VAA_PIX

Digital I/0

Power1

Digital

Core

Power1

PLL

Power1

Analog

Power1

Analog

Power1

1. All power supplies should be adequately decoupled.

2. ON Semiconductor recommends a resistor value of 1.5 kΩ, but a greater value may be used for slower two-wire speed.

4. ON Semiconductor recommends that 0.1 μF and 10 μF decoupling capacitors for each power supply are mounted as

close as possible to the pad. Actual values and results may vary depending on layout and design considerations.

Check the demo headboard schematics for circuit recommendations.

5. ON Semiconductor recommends that analog power planes are placed in a manner such that coupling with the digital

power planes is minimized.

7. The serial interface output pads and VDDSLVS can be left unconnected if the parallel output interface is used.

OE_BAR

TRIGGER

From

Controller

STANDBY