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SLA7062M Scheda tecnica(PDF) 1 Page - Allegro MicroSystems |
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SLA7062M Scheda tecnica(HTML) 1 Page - Allegro MicroSystems |
1 / 16 page UNIPOLAR STEPPER-MOTOR TRANSLATOR/DRIVERS Combining low-power CMOS logic with high-current, high-voltage power FET outputs, the Series SLA7060M translator/drivers provide complete control and drive for a two-phase unipolar stepper motor with internal fixed off time and pulse-width modulation (PWM) control of the output current in a power multi-chip module (PMCM™). There are no phase-sequence tables, high-frequency control lines, or complex interfaces to program. The CMOS logic section provides the sequencing logic, direction, control, synchronous/asynchronous PWM operation, and a “sleep” function. The minimum CLOCK input is an ideal fit for applications where a complex µP is unavailable or overburdened. TTL or LSTTL may require the use of appropriate pull-up resistors to ensure a proper input-logic high. For PWM current control, the maximum output current is determined by the user’s selection of a reference voltage and sensing resistor. The NMOS outputs are capable of sinking up to 1, 2, or 3 A (depending on device) and withstanding 46 V in the off state. Clamp diodes provide protection against inductive transients. Special power-up sequencing is not required. Half-, quarter-, eighth-, and sixteenth-step operation are externally selectable for the SLA7060/61/62M. Half-step excitation alternates between the one-phase and two-phase modes (AB-B-AB-A-AB-B-AB- A), providing an eight-step sequence. The Series SLA7060M is supplied in a 21-pin single in-line power- tab package with leads formed for vertical mounting (suffix LF2102). The tab is at ground potential and needs no insulation. For high-current or high-frequency applications, external heat sinking may be required. This device is rated for continuous operation between -20°C and +85°C. FEATURES To 3 A Output Rating Internal Sequencer for Microstepping Operation PWM Constant-Current Motor Drive Cost-Effective, Multi-Chip Solution 100 V, Avalanche-Rated NMOS Low r DS(on) NMOS Outputs Advanced, Improved Body Diodes Inputs Compatible with 3.3 V or 5 V Control Signals Sleep Mode Internal Clamp Diodes Always order by complete part number, e.g., SLA7060MLF2102 . ABSOLUTE MAXIMUM RATINGS Driver Supply Voltage, VBB ................ 46 V Load Supply Voltage, VM .................. 46 V Output Current, IO SLA7060M ................................. 1.0 A* SLA7061M ................................. 2.0 A* SLA7062M ................................. 3.0 A* Logic Supply Voltage, VDD ............... 7.0 V Logic Input Voltage Range, V I .......................... -0.3 V to VDD+ 0.3 V Sense Voltage, V S ........................ ±2.0 V† Reference Input Voltage Range, VREF .................................. -0.3 V to VDD+ 0.3 V Package Power Dissipation, PD ....................................... See Graph Junction Temperature, TJ ............. +150°C Operating Temperature Range, T A ................................. -20°C to +85°C Storage Temperature Range, TS ............................... -30°C to +150°C * Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or junction temperature. † Internal filtering provides protection against transients during the first 1 µs of the current-sense pulse. SLA7060M THRU SLA7062M PRELIMINARY INFORMATION (subject to change without notice) September 24, 2003 |
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