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ADE9000ACPZ-RL Scheda tecnica(PDF) 10 Page - Analog Devices |
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ADE9000ACPZ-RL Scheda tecnica(HTML) 10 Page - Analog Devices |
10 / 73 page Data Sheet ADE9000 Rev. A | Page 9 of 72 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter Rating VDD to GND −0.3 V to +3.96 V Analog Input Voltage to GND, IAP, IAN, IBP, IBN, ICP, ICN, VAP, VAN, VBP, VBN, VCP, VCN −2 V to +2 V Reference Input Voltage to REFGND −0.3 V to +2 V Digital Input Voltage to GND −0.3 V to VDD + 0.3 V Digital Output Voltage to GND −0.3 V to VDD + 0.3 V Operating Temperature Industrial Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 125°C Lead Temperature (Soldering, 10 sec)1 260°C ESD Human Body Model2 4 kV Machine Model3 300 V Field Induced Charged Device Model (FICDM) 4 1.25 kV 1 Analog Devices recommends that reflow profiles used in soldering RoHS compliant devices conform to J-STD-020D.1 from JEDEC. Refer to JEDEC for the latest revision of this standard. 2 Applicable standard: ANSI/ESDA/JEDEC JS-001-2014. 3 Applicable standard: JESD22-A115-A (ESD machine model standard of JEDEC). 4 Applicable standard: JESD22-C101F (ESD FICDM standard of JEDEC). Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. θJA and θJC are specified for the worst case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance Package Type θJA θJC Unit CP-40-71 27.14 3.13 °C/W 1 The junction to air measurement uses a 2S2P JEDEC test board with 4 × 4 standard JEDEC vias. The junction to case measurement uses a 1S0P JEDEC test board with 4 × 4 standard JEDEC vias. See JEDEC standard JESD51-2. ESD CAUTION |
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