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ADAV801 Scheda tecnica(PDF) 49 Page - Analog Devices |
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ADAV801 Scheda tecnica(HTML) 49 Page - Analog Devices |
49 / 61 page ADAV801 Rev. A | Page 48 of 60 DAC Control Register 4—Address 1100111 (0x67) Table 102. DAC Control Register 4 Bit Map 7 6 5 4 3 2 1 0 Reserved INTRPT ZEROSEL1 ZEROSEL0 Reserved Reserved Reserved Reserved Table 103. DAC Control Register 4 Bit Descriptions Bit Name Description INTRPT This bit selects the functionality of the ZEROL/INT pin. 0 = Pin functions as a ZEROL flag pin. 1 = Pin functions as an interrupt pin. ZEROSEL[1:0] These bits control the functionality of the ZEROR pin when the ZEROL/INT pin is used as an interrupt. 00 = Pin functions as a ZEROR flag pin. 01 = Pin functions as a ZEROL flag pin. 10 = Pin is asserted when either the left or right channel is zero. 11 = Pin is asserted when both the left and right channels are zero. DAC Left Volume—Address 1101000 (0x68) Table 104. DAC Left Volume Register Bit Map 7 6 5 4 3 2 1 0 DVOLL7 DVOLL6 DVOLL5 DVOLL4 DVOLL3 DVOLL2 DVOLL1 DVOLL0 Table 105. DAC Left Volume Register Bit Descriptions Bit Name Description DVOLL[7:0] DAC left channel volume control. 1111111 = 0 dBFS. 1111110 = −0.375 dBFS. 0000000 = −95.625 dBFS. DAC Right Volume—Address 1101001 (0x69) Table 106. DAC Right Volume Register Bit Map 7 6 5 4 3 2 1 0 DVOLR7 DVOLR6 DVOLR5 DVOLR4 DVOLR3 DVOLR2 DVOLR1 DVOLR0 Table 107. DAC Right Volume Register Bit Descriptions Bit Name Description DVOLR[7:0] DAC right channel volume control. 1111111 = 0 dBFS. 1111110 = −0.375 dBFS. 0000000 = −95.625 dBFS. DAC Left Peak Volume—Address 1101010 (0x6A) Table 108. DAC Left Peak Volume Register Bit Map 7 6 5 4 3 2 1 0 Reserved Reserved DLP5 DLP4 DLP3 DLP2 DLP1 DLP0 Table 109. DAC Left Peak Volume Register Bit Descriptions Bit Name Description DLP[5:0] DAC left channel peak volume detection. 000000 = 0 dBFS. 000001 = −1 dBFS. 111111 = −63 dBFS. |
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Descrizione simile - ADAV801_17 |
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