AD7172-4BCPZ-RL7 datasheet(3/62 Pages) AD

Il numero della parte	AD7172-4BCPZ-RL7

Spiegazioni elettronici	ADC with True Rail-to-Rail Buffers

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Produttore elettronici	AD [Analog Devices]

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AD7172-4

Data Sheet

Rev. B | Page 2 of 61

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

Specifications..................................................................................... 4

Timing Characteristics ................................................................ 7

Timing Diagrams.......................................................................... 7

Absolute Maximum Ratings............................................................ 8

Thermal Resistance ...................................................................... 8

ESD Caution.................................................................................. 8

Pin Configuration and Function Descriptions............................. 9

Typical Performance Characteristics ........................................... 11

Noise Performance and Resolution.............................................. 17

Getting Started ................................................................................ 18

Power Supplies ............................................................................ 19

Digital Communication............................................................. 19

AD7172-4 Reset.......................................................................... 20

Configuration Overview ........................................................... 20

Circuit Description......................................................................... 26

Buffered Analog Input ............................................................... 26

Crosspoint Multiplexer.............................................................. 26

AD7172-4 Reference .................................................................. 27

Buffered Reference Input........................................................... 28

Clock Source ............................................................................... 28

Digital Filters................................................................................... 29

Sinc5 + Sinc1 Filter..................................................................... 29

Sinc3 Filter................................................................................... 29

Single Cycle Settling ................................................................... 30

Enhanced 50 Hz and 60 Hz Rejection Filters ......................... 33

Operating Modes ............................................................................ 35

Continuous Conversion Mode ................................................. 35

Continuous Read Mode............................................................. 36

Single Conversion Mode ........................................................... 37

Standby and Power-Down Modes............................................ 38

Calibration................................................................................... 38

Digital Interface .............................................................................. 39

Checksum Protection................................................................. 39

CRC Calculation......................................................................... 40

Integrated Functions ...................................................................... 42

General-Purpose Input/Output................................................ 42

External Multiplexer Control ................................................... 42

Delay ............................................................................................ 42

16-Bit/24-Bit Conversions......................................................... 42

DOUT_RESET ........................................................................... 42

Synchronization.......................................................................... 42

Error Flags................................................................................... 43

DATA_STAT ............................................................................... 43

IOSTRENGTH ........................................................................... 43

Grounding and Layout .................................................................. 44

Register Summary .......................................................................... 45

Register Details ............................................................................... 47

Communications Register......................................................... 47

Status Register............................................................................. 48

ADC Mode Register................................................................... 49

Interface Mode Register ............................................................ 50

Register Check ............................................................................ 51

Data Register............................................................................... 51

GPIO Configuration Register................................................... 52

ID Register................................................................................... 53

Channel Register 0 ..................................................................... 54

Channel Register 1 to Channel Register 7 .............................. 55

Setup Configuration Register 0 ................................................ 56

Setup Configuration Register 1 to Setup Configuration

Register 7 ..................................................................................... 57

Filter Configuration Register 0................................................. 58

Filter Configuration Register 1 to Filter Configuration

Register 7 ..................................................................................... 59

Offset Register 0 ......................................................................... 59

Offset Register 1 to Offset Register 7....................................... 59

Gain Register 0............................................................................ 60

Gain Register 1 to Gain Register 7 ........................................... 60

Outline Dimensions ....................................................................... 61

Ordering Guide .......................................................................... 61

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