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FDD120AN15A0 Scheda tecnica(PDF) 6 Page - Fairchild Semiconductor |
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FDD120AN15A0 Scheda tecnica(HTML) 6 Page - Fairchild Semiconductor |
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6 / 11 page  ©2002 Fairchild Semiconductor Corporation FDP120AN15A0 / FDD120AN15A0 Rev. B Test Circuits and Waveforms Figure 15. Unclamped Energy Test Circuit Figure 16. Unclamped Energy Waveforms Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveforms Figure 19. Switching Time Test Circuit Figure 20. Switching Time Waveforms tP VGS 0.01 Ω L IAS + - VDS VDD RG DUT VARY tP TO OBTAIN REQUIRED PEAK IAS 0V VDD VDS BVDSS tP IAS tAV 0 VGS + - VDS VDD DUT Ig(REF) L VDD Qg(TH) VGS = 2V Qgs2 Qg(TOT) VGS = 10V VDS VGS Ig(REF) 0 0 Qgs Qgd VGS RL RGS DUT + - VDD VDS VGS tON td(ON) tr 90% 10% VDS 90% 10% tf td(OFF) tOFF 90% 50% 50% 10% PULSE WIDTH VGS 0 0 |
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