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RT5508 Scheda tecnica(PDF) 15 Page - Richtek Technology Corporation |
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RT5508 Scheda tecnica(HTML) 15 Page - Richtek Technology Corporation |
15 / 57 page RT5508 Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation DS5508-01 March 2017 www.richtek.com 15 DATA Output (I 2 S) Power ON init (I 2 C) Amp on setting (I 2 C) VDDD, VBAT PWDN (Reg) BCK (I 2 S) (SUSP) Power on OP 6ms 30ms 30ms 1ms Figure 7. Power ON Sequence VDDD, VBAT PWDN (Reg) BCK (I 2 S) DATA Output (I 2 S) Amp off setting (I 2 C) Amp off 65ms (SUSP) power off OP Figure 8. Power OFF Sequence I 2S Mode Change without PWDN Suspend mode is detected if the clock source from I2S is not valid according to the value of I2SFORMAT/I2SRATE. In this case, soft muting is implemented before entering suspend mode. In the opposite situation, if the clock source from I2S is detected valid again, signal ramp up is implemented at the start after it enters the operating mode. The above procedure is shown in Figure 9. BCK (I 2 S) SUSP OP Amp Output OP ramp down ramp up Figure 9. I2S Mode Change without PWDN |
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