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RT2910A Scheda tecnica(PDF) 8 Page - Richtek Technology Corporation

Il numero della parte RT2910A
Spiegazioni elettronici  High Efficiency Inverting PWM Converter with Surge Stopper
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Produttore elettronici  RICHTEK [Richtek Technology Corporation]
Homepage  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

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RT2910A
Copyright © 2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
DS2910A-00
August
2017
8
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
SFB Threshold
VSFB
SFB rising
0.585
0.6
0.615
V
Current Limit Threshold
VCS
90
100
110
mV
Inverting Output Voltage Range
NVOUT
12.5
--
0.5
V
TMR Fault Detection
TMR Threshold
VTMR_FT
POK pull low, FDLY source
10
A CURRENT
--
0.6
--
V
TMR Sense Blank Time
VTMR_BLK
TMR blank sensing after POK
High
--
3
--
ms
FDLY
FDLY Threshold
VFDLY
Rising edge
--
1.25
--
V
FDLY Output Current
IFDLY
--
10
--
A
Reference & LDO
VREF Output Voltage
VREF
IREF = 50A
1.225
1.25
1.275
V
VL Output Voltage
VVL
VIN = 5V, IVL = 0A
3.85
4.25
4.65
V
VL Load Regulation
VVL_Load
VIN = 5V, 0 < IVL < 2mA
--
20
60
mV
Oscillator
Oscillator Frequency
fSW
RRT = 300k
400
500
600
kHz
Maximum Duty
DMAX
300kHz to 800kHz
--
85
--
%
5VDET
5VDET Threshold
V5VDET
Falling edge, hys = 50mV
0.92
1
1.08
V
RDS(ON) & Thermal Shutdown
Internal P-MOSFET
On-Resistance
RDS(ON)
VIN = 5V, ILX = 10mA
--
80
120
m
Thermal Shutdown Temperature
TSD
--
150
--
°C
Note 1.
Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2.
JA is measured under natural convection (still air) at TA = 25C with the component mounted on a high effective-thermal-
conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.
JC is measured at the exposed pad
of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. GATE to OUT voltage is internally generated and clamped. External driving at GATE pin is forbidden because it may
damage the device.
Note 6. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to GND
unless otherwise specified.


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