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GS81314LD18GK-133I Scheda tecnica(PDF) 5 Page - GSI Technology |
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GS81314LD18GK-133I Scheda tecnica(HTML) 5 Page - GSI Technology |
5 / 40 page GS81314LD18/36GK-133/120/106 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.09 5/2016 5/40 © 2014, GSI Technology MZT[1:0] ODT Mode Select — Set the default ODT state globally for all input groups during power-up and reset. Must be tied High or Low. MZT[1:0] = 00: disables ODT on all input groups, regardless of PZT[1:0]. MZT[1:0] = 01: enables strong ODT on select input groups, as specified by PZT[1:0]. MZT[1:0] = 10: enables weak ODT on select input groups, as specified by PZT[1:0]. MZT[1:0] = 11: reserved. Note: The ODT state for each input group can be changed at any time via the Configuration Registers. Input PZT[1:0] ODT Configuration Select — Set the default ODT state for various combinations of input groups during power-up and reset, when MZT[1:0] = 01 or 10. Must be tied High or Low. PZT[1:0] = 00: enables ODT on write data only. PZT[1:0] = 01: enables ODT on write data and input clocks. PZT[1:0] = 10: enables ODT on write data, address, and control. PZT[1:0] = 11: enables ODT on write data, input clocks, address, and control. Note: The ODT state for each input group can be changed at any time via the Configuration Registers. Input VDD Core Power Supply — VDDQ I/O Power Supply — VREF Input Reference Voltage — Input buffer reference voltage. — VSS Ground — TCK JTAG Clock — Weakly pulled Low internally. Input TMS JTAG Mode Select — Weakly pulled High internally. Input TDI JTAG Data Input — Weakly pulled High internally. Input TDO JTAG Data Output Output MCH Must Connect High — May be tied to VDDQ directly or via a 1k resistor. Input MCL Must Connect Low — May be tied to VSS directly or via a 1k resistor. Input NC No Connect — There is no internal chip connection to these pins. They may be left unconnected, or tied/ driven High or Low. — NUI Not Used Input — There is an internal chip connection to these input pins, but they are unused by the device. They are pulled Low internally. They may be left unconnected or tied/driven Low. They should not be tied/driven High. Input NUO Not Used Output — There is an internal chip connection to these output pins, but they are unused by the device. The drivers are tri-stated internally. They should be left unconnected. Output Symbol Description Type |
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