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BTA15-400 Scheda tecnica(PDF) 4 Page - Sirectifier Semiconductors |
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BTA15-400 Scheda tecnica(HTML) 4 Page - Sirectifier Semiconductors |
4 / 4 page F ig. 6: Non-repetitive s urge peak on-s tate current for a s inus oidal puls e with width tp < 10ms, and corres ponding value of I²t. F ig. 7: R elative variation of gate trigger current, holding current and latching current versus junction temperature (typical values ). F ig. 8: R elative variation of critical rate of decreas e of main current vers us (dV /dt)c (typical values ). F ig. 9: R elative variation of critical rate of decreas e of main current vers us junction temperature. 0.01 0.10 1.00 10.00 100 1000 3000 tp (ms ) IT S M (A ), I² t (A ² s ) T j initial=25°C IT S M I²t dI/dt limitation: 50A /µs -40 -20 0 20 40 60 80 100 120 140 0.0 0.5 1.0 1.5 2.0 2.5 T j(° C ) IG T,IH,IL [T j] / IG T,IH,IL [T j=25° C ] IG T IH & IL 0.1 1.0 10.0 100.0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 (dV /dt)c (V /µs ) (dI/dt)c [(dV /dt)c] / S pecified (dI/dt)c B W/C W/T 1635 C B S W 0 25 50 75 100 125 0 1 2 3 4 5 6 T j (° C ) (dI/dt)c [T j] / (dI/dt)c [T j s pecified] BTA15 Discrete Triacs(Isolated) P4 ©2008 SIRECTIFIER All rights reserved, Tel: +86-519-86800000 Fax: +86-519-88019019 E-mail: sales@sirectifier.com www.sirectifier.com |
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