54FCT574LBG8 datasheet(2/7 Pages) IDT

Il numero della parte	54FCT574LBG8

Spiegazioni elettronici	FAST CMOS OCTAL D REGISTERS (3-STATE)

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Produttore elettronici	IDT [Integrated Device Technology]

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MILITARYANDINDUSTRIALTEMPERATURERANGES

2

IDT54/74FCT574T/AT/CT

FASTCMOSOCTALDREGISTERS(3-STATE)

PIN CONFIGURATION

Symbol

Description

Max

Unit

VTERM(2) Terminal Voltage with Respect to GND

–0.5 to +7

V

VTERM(3) Terminal Voltage with Respect to GND

–0.5 to VCC+0.5

V

TSTG

Storage Temperature

–65 to +150

°C

IOUT

DC Output Current

–60 to +120

mA

ABSOLUTE MAXIMUM RATINGS(1)

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability. No terminal voltage may exceed

Vcc by +0.5V unless otherwise noted.

2. Inputs and Vcc terminals only.

3. Output and I/O terminals only.

Symbol

Parameter(1)

Conditions

Typ.

Max.

Unit

CIN

Input Capacitance

VIN = 0V

6

10

pF

COUT

Output Capacitance

VOUT = 0V

8

12

pF

CAPACITANCE (TA = +25°C, F = 1.0MHz)

NOTE:

1. This parameter is measured at characterization but not tested.

2

3

1

16

15

14

11

19

18

20

17

13

12

5

6

7

4

8

9

10

OE

D0

D1

VCC

D3

D4

D5

D7

GND

Q0

Q3

Q1

Q2

Q4

Q7

Q5

Q6

CP

D2

D6

1

2

3

4

5

7

9

6

8

10

11

12

13

14

15

16

17

18

19

20

Q3

Q1

Q2

Q4

Q5

INDEX

D6

D2

D5

D3

D4

CERDIP/ SOIC/ TSSOP

TOP VIEW

LCC

TOP VIEW

NOTE:

1. H = HIGH Voltage Level

X = Don’t Care

L = LOW Voltage Level

Z = High Impedance

NC = No Change

↑ = LOW-to-HIGH transition

FUNCTION TABLE(1)

Inputs

Outputs

Internal

Function

OE

CP

Dx

Qx

High-Z

H

L

X

Z

N C

HH

X

Z

N C

Load

L

↑

LL

H

Register

L

↑

HH

L

H

↑

LZ

H

↑

HZ

L

Pin Names

Description

Dx

D flip-flop data inputs

CP

Clock Pulse for the register. Enters data on LOW-to-

HIGH transition.

Q x

3-State Outputs (TRUE)

Q x

3-State Outputs (INVERTED)

OE

Active LOW 3-State Output Enable Input

PIN DESCRIPTION

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