CDCVF2505D datasheet(4/23 Pages) TI1

Il numero della parte	CDCVF2505D

Spiegazioni elettronici	3.3-V Clock Phase-Lock Loop Clock Driver

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Produttore elettronici	TI1 [Texas Instruments]

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CDCVF2505

SCAS640G – JULY 2000 – REVISED AUGUST 2016

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(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

(3)

This value is limited to 4.3 V maximum.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VDD

Supply voltage

–0.5

4.3

V

VI

Input voltage(2)(3)

–0.5

VDD + 0.5

V

VO

Output voltage(2)(3)

–0.5

VDD + 0.5

V

IIK

Input clamp current (VI < 0 or VI > VDD)

±50

mA

IOK

Output clamp current (VO < 0 or VO > VDD)

±50

mA

IO

Continuous total output current (VO = 0 to VDD)

±50

mA

Tstg

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±1000

Machine model (MM)

±300

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VDD

Supply voltage

3

3.3

3.6

V

VIH

High-level input voltage

0.7 VDD

V

VIL

Low-level input voltage

0.3 VDD

V

VI

Input voltage

0

VDD

V

IOH

High-level output current

–12

mA

IOL

Low-level output current

12

mA

TA

Operating free-air temperature

–40

85

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2)

The package thermal impedance is calculated in accordance with JESD 51.

7.4 Thermal Information

THERMAL METRIC(1)

CDCVF2505

UNIT

D (SOIC)

PW (TSSOP)

8 PINS

RθJA

Junction-to-ambient thermal resistance(2)

112.3

175.8

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

55.8

61.8

°C/W

RθJB

Junction-to-board thermal resistance

53.1

104.3

°C/W

ψJT

Junction-to-top characterization parameter

12.8

7.7

°C/W

ψJB

Junction-to-board characterization parameter

52.5

102.6

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

—

°C/W

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