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5V41235PGGI Scheda tecnica(PDF) 5 Page - Integrated Device Technology |
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5V41235PGGI Scheda tecnica(HTML) 5 Page - Integrated Device Technology |
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5 / 18 page  5V41235 2 OUTPUT PCIE GEN1/2/3 SYNTHESIZER IDT® 2 OUTPUT PCIE GEN1/2/3 SYNTHESIZER 5 5V41235 MAY 5, 2017 Layout Guidelines Common R ecommendations for Differential Routing D imension or Value Unit Figure L1 length, route as non-coupled 50ohm trace 0.5 max inch 1 L2 length, route as non-coupled 50ohm trace 0.2 max inch 1 L3 length, route as non-coupled 50ohm trace 0.2 max inch 1 Rs 33 ohm 1 Rt 49.9 ohm 1 Down Device Differential Routing L4 length, route as coupled microstrip 100ohm differential trace 2 min to 16 max inch 1 L4 length, route as coupled stripline 100ohm differential trace 1.8 min to 14.4 max inch 1 Differential Routing to PCI Express Connector L4 length, route as coupled microstrip 100ohm differential trace 0.25 to 14 max inch 2 L4 length, route as coupled stripline 100ohm differential trace 0.225 min to 12.6 max inch 2 SRC Reference Clock HCSL Output Buffer L1 L1' Rs L2 L2' Rs L4' L4 L3 L3' Rt Rt PCI Express Down Device REF_CLK Input Figure 1: Down Device Routing HCSL Output Buffer L1 L1' Rs L2 L2' Rs L4' L4 L3 L3' Rt Rt PCI Express Add-in Board REF_CLK Input Figure 2: PCI Express Connector Routing |
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