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SI4022 Scheda tecnica(PDF) 9 Page - Silicon Laboratories |
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SI4022 Scheda tecnica(HTML) 9 Page - Silicon Laboratories |
9 / 22 page Si4022 CONTROL INTERFACE Commands to the transmitters are sent serially. Data bits on pin SDI are shifted into the device upon the rising edge of the clock on pin SCK whenever the chip select pin nSEL is low. When the nSEL signal is high, it initializes the serial interface. The number of bits sent is an integer multiple of 8 (except for the Transmitter FIFO Write Command). All commands consist of a command code, followed by a varying number of parameter or data bits. All data are sent MSB first (e.g. bit 15 for a 16-bit command). Bits having no influence (don’t care) are indicated with X. The Power On Reset (POR) circuit sets default values in all control and command registers. Timing Specification Symbol Parameter Minimum value [ns] tCH Clock high time 25 tCL Clock low time 25 tSS Select setup time (nSEL falling edge to SCK rising edge) 10 tSH Select hold time (SCK falling edge to nSEL rising edge) 10 tSHI Select high time 25 tDS Data setup time (SDI transition to SCK rising edge) 5 tDH Data hold time (SCK rising edge to SDI transition) 5 tOD Data delay time 10 Timing Diagram t SS t SHI nSEL t CH t CL t OD t SH SCK t DS t DH SDI BIT15 BIT14 BIT13 BIT8 BIT7 BIT1 BIT0 SDO BIT15 BIT14 BIT13 BIT8 BIT7 BIT1 BIT0 |
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