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Si1082-A-GM Scheda tecnica(PDF) 7 Page - Silicon Laboratories

Il numero della parte Si1082-A-GM
Spiegazioni elettronici  MCU with Integrated 240??60 MHz EZRadioPRO짰 Transceiver
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Produttore elettronici  SILABS [Silicon Laboratories]
Homepage  http://www.silabs.com
Logo SILABS - Silicon Laboratories

Si1082-A-GM Scheda tecnica(HTML) 7 Page - Silicon Laboratories

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Rev. 1.0
7
Si106x/108x
List of Figures
Figure 1.1. Si106x/Si108x Block Diagram ............................................................... 16
Figure 1.2. Si106x/108x RX/TX Direct-Tie Application Example ............................. 17
Figure 1.3. Si106x/108x Antenna Diversity Application Example ............................ 17
Figure 1.4. Port I/O Functional Block Diagram ........................................................ 19
Figure 1.5. PCA Block Diagram ............................................................................... 20
Figure 1.6. ADC0 Functional Block Diagram ........................................................... 21
Figure 1.7. ADC0 Multiplexer Block Diagram .......................................................... 22
Figure 1.8. Comparator 0 Functional Block Diagram .............................................. 23
Figure 1.9. Comparator 1 Functional Block Diagram .............................................. 23
Figure 3.1. Si1060/1, Si1080/1-A-GM Pinout Diagram (Top View) ......................... 34
Figure 3.2. Si1062/3, Si1082/3-A-GM Pinout Diagram (Top View) ......................... 35
Figure 3.3. Si1064/5, Si1084/5-A-GM Pinout Diagram (Top View) ......................... 36
Figure 3.4. QFN-36 Package Drawing .................................................................... 37
Figure 3.5. QFN-36 PCB Land Pattern Dimensions ................................................ 39
Figure 3.6. QFN-36 PCB Stencil and Via Placement .............................................. 41
Figure 4.1. Active Mode Current (External CMOS Clock) ....................................... 46
Figure 4.2. Idle Mode Current (External CMOS Clock) ........................................... 47
Figure 4.3. Typical DC-DC Converter Efficiency (High Current, VDD/DC+ = 2 V ... 48
Figure 4.4. Typical DC-DC Converter Efficiency (High Current, VDD/DC+ = 3 V) .. 49
Figure 4.5. Typical DC-DC Converter Efficiency (Low Current, VDD/DC+ = 2 V) ... 50
Figure 4.6. Typical One-Cell Suspend Mode Current .............................................. 51
Figure 4.7. Typical VOH Curves, 1.8–3.6 V ............................................................ 53
Figure 4.8. Typical VOH Curves, 0.9–1.8 V ............................................................ 54
Figure 4.9. Typical VOL Curves, 1.8–3.6 V ............................................................. 55
Figure 4.10. Typical VOL Curves, 0.9–1.8 V ........................................................... 56
Figure 5.1. ADC0 Functional Block Diagram ........................................................... 78
Figure 5.2. 10-Bit ADC Track and Conversion Example Timing (BURSTEN = 0) ... 81
Figure 5.3. Burst Mode Tracking Example with Repeat Count Set to 4 .................. 83
Figure 5.4. ADC0 Equivalent Input Circuits ............................................................. 84
Figure 5.5. ADC Window Compare Example: Right-Justified Single-Ended Data .. 94
Figure 5.6. ADC Window Compare Example: Left-Justified Single-Ended Data ..... 94
Figure 5.7. ADC0 Multiplexer Block Diagram .......................................................... 95
Figure 5.8. Temperature Sensor Transfer Function ................................................ 97
Figure 5.9. Temperature Sensor Error with 1-Point Calibration (VREF = 1.68 V) .... 98
Figure 5.10. Voltage Reference Functional Block Diagram ................................... 100
Figure 6.1. Comparator 0 Functional Block Diagram ............................................ 103
Figure 6.2. Comparator 1 Functional Block Diagram ............................................ 104
Figure 6.3. Comparator Hysteresis Plot ................................................................ 105
Figure 6.4. CPn Multiplexer Block Diagram ........................................................... 110
Figure 7.1. CIP-51 Block Diagram ......................................................................... 113
Figure 8.1. Si106x Memory Map ........................................................................... 122
Figure 8.2. Si108x Memory Map ........................................................................... 123
Figure 8.3. Si106x Flash Program Memory Map ................................................... 124


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