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STFW2N105K5 Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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STFW2N105K5 Scheda tecnica(HTML) 5 Page - STMicroelectronics |
5 / 14 page DocID026320 Rev 1 5/14 STFW2N105K5 Electrical characteristics 14 The built-in back-to-back Zener diodes have specifically been designed to enhance the device's ESD capability. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max Unit t d(on) Turn-on delay time V DD = 525 V, I D = 0.75 A, R G = 4.7 Ω, V GS = 10 V (see Figure 15) - 14.5 - ns t r Rise time - 8.5 - ns t d(off) Turn-off-delay time - 35 - ns t f Fall time - 38.5 - ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max Unit I SD Source-drain current - 1.5 A I SDM (1) 1. Pulse width limited by safe operating area Source-drain current (pulsed) - 6 A V SD (2) 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5% Forward on voltage I SD = 1.5 A, V GS = 0 - 1.5 V t rr Reverse recovery time I SD = 1.5 A, di/dt = 100 A/μs V DD = 60 V (see Figure 17) - 326 ns Q rr Reverse recovery charge - 1.19 μC I RRM Reverse recovery current - 7.3 A t rr Reverse recovery time I SD = 1.5 A, di/dt = 100 A/μs V DD = 60 V T J = 150 °C (see Figure 17) - 525 ns Q rr Reverse recovery charge - 1.83 μC I RRM Reverse recovery current - 7 A Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min Typ. Max. Unit V (BR)GSO Gate-source breakdown voltage I GS = ± 1mA, I D =0 30 - - V |
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