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STF23N80K5 Scheda tecnica(PDF) 4 Page - STMicroelectronics |
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STF23N80K5 Scheda tecnica(HTML) 4 Page - STMicroelectronics |
4 / 13 page Electrical characteristics STF23N80K5 4/13 DocID028292 Rev 1 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 800 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 800 V 1 µA VGS = 0 V, VDS = 800 V, Tcase = 125 °C 50 IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4 5 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 8 A 0.23 0.28 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 1000 - pF Coss Output capacitance - 65 - Crss Reverse transfer capacitance - 1.5 - CO(tr)(1) Equivalent output capacitance VDS = 0 to 640 V, VGS = 0 V - 165 - pF CO(er)(2) Equivalent output capacitance VDS = 0 to 640 V, VGS = 0 V - 59 - RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 4.7 - Ω Qg Total gate charge VDD = 640 V, ID = 16 A, VGS = 10 V (see Figure 14: "Test circuit for gate charge behavior") - 33 - nC Qgs Gate-source charge - 6 - Qgd Gate-drain charge - 25 - Notes: (1) Time related is defined as a constant equivalent capacitance giving the same charging time as COSS when VDS increases from 0 to 80% VDSS. (2) Energy related is defined as a constant equivalent capacitance giving the same stored energy as COSS when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 400 V, ID = 8 A RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") - 14 - ns tr Rise time - 9 - td(off) Turn-off delay time - 48 - tf Fall time - 9 - |
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