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ADF4007 Scheda tecnica(PDF) 1 Page - Analog Devices |
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ADF4007 Scheda tecnica(HTML) 1 Page - Analog Devices |
1 / 16 page High Frequency Divider/PLL Synthesizer ADF4007 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. FEATURES 7.5 GHz bandwidth Maximum PFD frequency of 120 MHz Divide ratios of 8, 16, 32, or 64 2.7 V to 3.3 V power supply Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems RSET contol of charge pump current Hardware power-down mode APPLICATIONS Satellite communications Broadband wireless access CATV Instrumentation Wireless LANs GENERAL DESCRIPTION The ADF4007 is a high frequency divider/PLL synthesizer that can be used in a variety of communications applications. It can operate to 7.5 GHz on the RF side and to 120 MHz at the PFD. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, and a divider/prescaler. The divider/ prescaler value can be set by two external control pins to one of four values (8, 16, 32, or 64). The reference divider is permanently set to 2, allowing an external REFIN frequency of up to 240 MHz. A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and a VCO (voltage controlled oscillator). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost. FUNCTIONAL BLOCK DIAGRAM REFIN RFINA RFINB VDD N2 N1 GND R COUNTER ÷ 2 MUX MUXOUT CPGND RSET VP CP PHASE FREQUENCY DETECTOR REFERENCE CHARGE PUMP ADF4007 N COUNTER ÷ 8, ÷ 16, ÷ 32, ÷ 64 M2 M1 Figure 1. |
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