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AD7322 Scheda tecnica(PDF) 7 Page - ATMEL Corporation |
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AD7322 Scheda tecnica(HTML) 7 Page - ATMEL Corporation |
7 / 18 page AD7322 Preliminary Technical Data Pin Functional Descriptions 14 13 12 11 9 TOP VIEW (Not to Scale) 8 1 2 3 4 7 6 5 AD7322 CS DIN SCLK REFIN/OUT VSS DGND DOUT VIN1 10 VDRIVE VIN0 AGND DGND VDD 8++ Figure 3. AD7322 Pin Configuration TSSOP Table 4. AD7324 Pin Function Descriptions Pin Mnemonic Pin Number Description SCLK 14 Serial Clock. Logic Input. A serial clock input provides the SCLK used for accessing the data from the AD7322. This clock is also used as the clock source for the conversion process. DOUT 12 Serial Data Output. The conversion output data is supplied to this pin as a serial data stream. The bits are clocked out on the falling edge of the SCLK input and 16 SCLKs are required to access the data. The data stream consists of two leading zeros, one channel identification bit, a Sign bit followed by 12 bits of conversion data. The data is provided MSB first. See the Serial Interface section. CS 1 Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7322 and frames the serial data transfer. DIN 2 Data In. Data to be written to the on-chip registers is provided on this input and is clocked into the register on the falling edge of SCLK. See Register section. AGND 4 Analog Ground. Ground reference point for all analog circuitry on the AD7322. All analog input signals and any external reference signal should be referred to this AGND voltage. REF IN/ REFOUT 5 Reference Input/ Reference Output pin. When enabled the on-chip reference is available on this pin for use external to the AD7322. Alternativley, the internal reference can be disabled and an external reference applied to this input. When using the AD7322 with an external reference, the internal reference must be disabled via the control register. The nominal reference voltage is 2.5 V, which appears at the pin. The default on power up is for external Reference operation. See . VCC 10 Analog Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for the ADC core on the AD7322. This supply should be decoupled to AGND. VDD 9 Positive power supply voltage. This is the positive supply voltage for the Analog Input section. VSS 6 Negative power supply voltage. This is the negavtive supply voltage for the Analog Input section. DGND 3,13 This is the Digital Ground pin. VDRIVE 11 Logic Power Supply input. The voltage applied to this pin determines the operating voltge of the sertial inteface. Vin0-Vin1 7,8 Analog input 0 through Analog Input 1. The analog inputs are multiplexed into the on-chip track-and-hold. The analog input channel for conversion is selected by programming the channel address bit ADD0, in the control register. The inputs can be configured as 2 Single- Ended Inputs, 1 True Differential Input pair, 1 Pseudo Differential inputs. The configuration of the Analog inputs is selected by programming the Mode bits, Mode1 and Mode0, in the Control Register. The input range on each input channel is controlled by programming the range register. Inputs ranges of ±10V, ±5V, ±2.5V and 0 to 10V can be selected on each analog input channel. See Register section. Table 8 Rev. PrE | Page 7 of 18 |
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Descrizione simile - AD7322 |
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