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MC145740 Scheda tecnica(PDF) 6 Page - Motorola, Inc |
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MC145740 Scheda tecnica(HTML) 6 Page - Motorola, Inc |
6 / 12 page MC145740 MOTOROLA 6 Figure 4. Serial Interface Timing NOTES: 1. The data in front of the EN signal will be latched. 2. The latched data will be repeated until there is an EN pulse. 3. The detected data will be updated with the next EN pulse. 4. After the R/W pin becomes inactive, the data will be lost. 5. D1 corresponds to CLK1. 6. The EN and CLK signals need to be set at the logic low level when the R/W signal changes. 7. The CLK signal must be held low when the EN signal is high. T3 A3 CD1 12 3 4 1 2 3 6 STATUS REGISTER CONTROL REGISTER (NOTE 1) (NOTE 6) 8 7 5 4 7 10 EN CLK DATA R/W D0 D0 12 3 0 1 2 3 (NOTE 6) 17 13 4 EN CLK DATA R/W D1 D2 D3 12 1 D1 D2 D0 12 18 D1 4 5 5 (NOTE 3) 14 15 16 11 (NOTE 4) HIGH IMPEDANCE (NOTE 2) 1 (NOTE 5) T2 A2 CD0 T1 A1 SQ T0 A0 M2 M1 M0 (LSB CLOCK) 56 7 8 9 10 11 12 13 14 9 |
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