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Si7054 Scheda tecnica(PDF) 8 Page - Silicon Laboratories |
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Si7054 Scheda tecnica(HTML) 8 Page - Silicon Laboratories |
8 / 26 page Si7050/1/3/4/5-A20 8 Rev. 1.14 Table 5. Thermal Characteristics Parameter Symbol Test Condition DFN-6 Unit Junction to Air Thermal Resistance JA JEDEC 2-Layer board, No Airflow 256 °C/W Junction to Air Thermal Resistance JA JEDEC 2-Layer board, 1 m/s Airflow 224 °C/W Junction to Air Thermal Resistance JA JEDEC 2-Layer board, 2.5 m/s Airflow 205 °C/W Junction to Case Thermal Resistance JC JEDEC 2-Layer board 22 °C/W Junction to Board Thermal Resistance JB JEDEC 2-Layer board 134 °C/W Table 6. Absolute Maximum Ratings1 Parameter Symbol Test Condition Min Typ Max Unit Ambient temperature under bias –55 — 125 °C Storage Temperature2 –65 — 150 °C Voltage on I/O pins –0.3 — VDD+0.3 V V Voltage on VDD with respect to GND –0.3 4.2 V ESD Tolerance HBM — — 2 kV CDM — — 1.25 kV MM — — 250 V Notes: 1. Absolute maximum ratings are stress ratings only, operation at or beyond these conditions is not implied and may shorten the life of the device or alter its performance. 2. Special handling considerations apply; see application note, “AN607: Si70xx Humidity and Temperature Sensor Designer’s Guide”. |
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