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SI5351-B Scheda tecnica(PDF) 8 Page - Silicon Laboratories |
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SI5351-B Scheda tecnica(HTML) 8 Page - Silicon Laboratories |
8 / 41 page Si5351A/B/C-B 8 Rev. 1.0 Table 7. Crystal Requirements1,2 Parameter Symbol Min Typ Max Unit Crystal Frequency fXTAL 25 — 27 MHz Load Capacitance CL 6— 12 pF Equivalent Series Resistance rESR —— 150 Crystal Max Drive Level dL 100 — — µW Notes: 1. Crystals which require load capacitances of 6, 8, or 10 pF should use the device’s internal load capacitance for optimum performance. See register 183 bits 7:6. A crystal with a 12 pF load capacitance requirement should use a combination of the internal 10 pF load capacitance in addition to external 2 pF load capacitance (e.g., by using 4 pF capacitors on XA and XB). 2. Refer to “AN551: Crystal Selection Guide” for more details. Table 8. I2C Specifications (SCL,SDA)1 Parameter Symbol Test Condition Standard Mode 100 kbps Fast Mode 400 kbps Unit Min Max Min Max LOW Level Input Voltage VILI2C –0.5 0.3 x VDDI2 C –0.5 0.3 x VDDI2C 2 V HIGH Level Input Voltage VIHI2C 0.7 x VDDI2 C 3.6 0.7 x VDDI2C 2 3.6 V Hysteresis of Schmitt Trigger Inputs VHYS —— 0.1 — V LOW Level Output Voltage (open drain or open collector) at 3 mA Sink Current VOLI2C 2 VDDI2C 2 = 2.5/3.3 V 0 0.4 0 0.4 V Input Current III2C –10 10 –10 10 µA Capacitance for Each I/O Pin CII2C VIN = –0.1 to VDDI2C —4 — 4 pF I2C Bus Timeout TTO Timeout Enabled 25 35 25 35 ms Notes: 1. Refer to NXP’s UM10204 I2C-bus specification and user manual, revision 03, for further details, go to: www.nxp.com/acrobat_download/usermanuals/UM10204_3.pdf. 2. Only I2C pullup voltages (VDDI2C) of 2.25 to 3.63 V are supported. |
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