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MC145145P2 Scheda tecnica(PDF) 1 Page - Motorola, Inc |
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MC145145P2 Scheda tecnica(HTML) 1 Page - Motorola, Inc |
1 / 2 page MC145145–2 MOTOROLA 1 4-Bit Data Bus Input PLL Frequency Synthesizer Interfaces with Single–Modulus Prescalers The MC145145–2 is programmed by a 4–bit input, with strobe and address lines. The device features consist of a reference oscillator, 12–bit program- mable reference divider, digital phase detector, 14–bit programmable divide– by–N counter, and the necessary latch circuitry for accepting the 4–bit input data. • Operating Temperature Range: – 40 to 85°C • Low Power Consumption Through the Use of CMOS Technology • 3.0 to 9.0 V Supply Range • Single Modulus 4–Bit Data Bus Programming •÷N Range = 3 to 16,383, ÷R Range = 3 to 4,095 • “Linearized” Digital Phase Detector Enhances Transfer Function Linearity • Two Error Signal Options: Single–Ended (Three–State) Double–Ended NOT RECOMMENDED FOR NEW DESIGNS; PRODUCT TO BE PHASED OUT. Closest equivalents are the MC145151–2, MC145170–1, MC14519X series, and MC14520X series. BLOCK DIAGRAM φV LD ST A2 A1 A0 D3 D2 D1 D0 LOCK DETECT PHASE DETECTOR B PHASE DETECTOR A 12–BIT R COUNTER LATCHES LATCH CONTROL CIRCUITRY 14–BIT N COUNTER LATCH 1 LATCH 2 L3 REFout OSCin OSCout fin PDout φR LATCH 4 LATCH 5 LATCH 6 fR fV LATCH 0 Order this document by MC145145–2/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA PIN ASSIGNMENTS MC145145-2 P SUFFIX PLASTIC DIP CASE 707 DW SUFFIX SOG PACKAGE CASE 751D ORDERING INFORMATION MC145145P2 Plastic DIP MC145145DW2 SOG Package 18 1 20 1 VDD fin D0 D1 A1 A0 OSCout OSCin VSS φR REFout D3 D2 A2 ST PDout LD φV 14 15 16 17 18 10 11 12 13 5 4 3 2 1 9 8 7 6 PLASTIC DIP VDD fin NC D0 D1 A1 A0 OSCout OSCin VSS 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 φV φR REFout D3 D2 NC A2 ST PDout LD SOG PACKAGE NC = NO CONNECTION © Motorola, Inc. 1998 REV 2 1/98 TN98012200 |
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