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HCPL-2533 Scheda tecnica(PDF) 11 Page - AVAGO TECHNOLOGIES LIMITED |
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HCPL-2533 Scheda tecnica(HTML) 11 Page - AVAGO TECHNOLOGIES LIMITED |
11 / 11 page RecommendedCircuitDesignParameters LSTTL-to- TTL-to- Parameter Symbol LSTTL LSTTL Units Comments Fig.Note Input LogicLowOutput VOL(A) 0.5 0.4 V Maximum Voltage–InputGate SupplyVoltage–Input VCC1 5.0 5.0 V ±5% InputResistor RIN 360 180 Ω ±5% 8a 430 200 8b InputCurrent IF 8 16 mA Nominal InputCurrentRange IF 6.75–10 14.0–20 mA 8a 14.5–20 8b Output LogicLowOutput VOL(B) 0.5 0.5 V Maximum Voltage–HCPL-2533 SupplyVoltage–Input VCC2 5.0 5.0 V ±5% Pull-UpResistor RL 20 8.2 kΩ ±5% 13 RequiredCurrentSink IOL 0.61 1.0 mA WorstCaseVCC, 14 forLogicLow (max) RL,IIL(B) HCPL-2533Current CTR 11 9 % MinimumTA=0°Cto TransferRatio +70°C LogicLowOutput IOL 0.74 1.26 mA WorstCaseVCC,CTR,IF 8a 15 Current–HCPL-2533 (min) 1.30 TA=0°Cto+70°C 8b DataRate fD 250 250 Kb/s NRZ,TA=25°C 16 Notes: 12. Theinvertingcircuithashigherpowerconsumptionandmustuseopencollectorgatesontheinput. 13. TheloadresistorRLmustbelargeenoughtoguaranteelogicLOWandsmallenoughtoguaranteelogicHIGHunderworstcaseconditions: VCC(max)–VOL VCC(min)–VIH(B) IOL(2533)–IIL(B) IOH(2533)–IIH(B) TheselectionofRListhesameforbothinvertingandnon-invertingcircuits. 14. ThemaximumcurrentsinkrequiredforlogicLOWis: IOL(max)=IIL(B)(max)+IR(max) whereIRisthecurrentthroughRL. 15. TheratioofIOL(min)toIOL(max)givesthedesignmarginforCTRdegradation.SeeApplicationNote1002. 16. Themaximumdatarateisdefinedas: 1 tPHL+tPLH fD=bits/secondNRZ ≤RL≤ For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5953-0458 AV02-0521EN - June 19, 2007 |
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