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UC1825A-SP Scheda tecnica(PDF) 9 Page - Texas Instruments

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Il numero della parte UC1825A-SP
Spiegazioni elettronici  Class-V, Radiation Hardened High-Speed PWM Controller
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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UC1825A-SP Scheda tecnica(HTML) 9 Page - Texas Instruments

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UDG-95105
CLK/LEB
LEB
CT
Blanked RAMP
to PWM
RAMP Input
t
LEB + 0.5
R
ø 10 kW
C
9
UC1825A-SP
www.ti.com
SLUS873C – JANUARY 2009 – REVISED DECEMBER 2016
Product Folder Links: UC1825A-SP
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
Feature Description (continued)
To program a leading edge blanking (LEB) period, connect a capacitor, C, to CLK/LEB. The discharge time set
by C and the internal 10-k
Ω resistor determines the blanked interval. The 10-kΩ resistor has a 10% tolerance.
For more accuracy, an external 2-k
Ω 1% resistor (R) can be added, resulting in an equivalent resistance of
1.66 k
Ω with a tolerance of 2.4%. The design equation is shown in Equation 1:
(1)
Values of R less than 2 k
Ω must not be used.
Leading edge blanking is also applied to the current limit comparator (see Figure 3). After LEB, if the ILIM pin
exceeds the 1-V threshold, the pulse is terminated. The overcurrent comparator, however, is not blanked. It
catches catastrophic overcurrent faults without a blanking delay. Any time the ILIM pin exceeds 1.2 V, the fault
latch is set and the outputs driven low. For this reason, some noise filtering may be required on the ILIM pin.
Figure 3. Leading Edge Blanking Operational Waveforms
8.3.2 UVLO, Soft-Start, and Fault Management
Soft-start is programmed by a capacitor on the SS pin. At power up, SS is discharged. When SS is low, the error
amplifier output is also forced low. While the internal 9-μA source charges the SS pin, the error amplifier output
follows until closed loop regulation takes over.
Anytime ILIM exceeds 1.2 V, the fault latch is set and the output pins are driven low, as shown in Figure 4. The
soft-start cap is then discharged by a 250-μA current sink. No more output pulses are allowed until soft-start is
fully discharged and ILIM is less than 1.2 V. At this point the fault latch resets and the chip executes a soft-start.
Should the fault latch get set during soft-start, the outputs are immediately terminated, but the soft-start capacitor
does not discharge until it has been fully charged first. This results in a controlled hiccup interval for continuous
fault conditions.


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