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LM341 Scheda tecnica(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Il numero della parte LM341
Spiegazioni elettronici  3-Terminal Positive Voltage Regulators
Download  11 Pages
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM341 Scheda tecnica(HTML) 7 Page - National Semiconductor (TI)

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Design Considerations (Continued)
The LM78MXX/LM341XX regulators have internal thermal
shutdown to protect the device from over-heating. Under all
possible operating conditions, the junction temperature of
the LM78MXX/LM341XX must be within the range of 0˚C to
125˚C. A heatsink may be required depending on the maxi-
mum power dissipation and maximum ambient temperature
of the application. To determine if a heatsink is needed, the
power dissipated by the regulator, P
D, must be calculated:
I
IN = IL +IG
P
D = (VIN−VOUT)IL +VINIG
shows the voltages and currents which are present in the
circuit.
The next parameter which must be calculated is the maxi-
mum allowable temperature rise, T
R(max):
θ
JA = TR (max)/PD
If the maximum allowable value for
θ
JA˚C/w is found to be
≥60˚C/W for TO-220 package or ≥92˚C/W for TO-252 pack-
age, no heatsink is needed since the package alone will dis-
sipate enough heat to satisfy these requirements. If the cal-
culated value for
θ
JA fall below these limits, a heatsink is
required.
As a design aid,
Table 1 shows the value of the
θ
JA of
TO-252 for different heatsink area. The copper patterns that
we used to measure these
θ
JA are shown at the end of the
Application Note Section. reflects the same test results as
what are in the
Table 1
shows the maximum allowable power dissipation vs. ambi-
ent temperature for theTO-252 device. shows the maximum
allowable power dissipation vs. copper area (in
2) for the
TO-252 device. Please see AN1028 for power enhancement
techniques to be used with TO-252 package.
TABLE 1.
θ
JA Different Heatsink Area
Layout
Copper Area
Thermal Resistance
Top Sice (in
2)*
Bottom Side (in
2)(
θ
JA, ˚C/W) TO-252
1
0.0123
0
103
2
0.066
0
87
3
0.3
0
60
4
0.53
0
54
5
0.76
0
52
610
47
7
0
0.2
84
8
0
0.4
70
9
0
0.6
63
10
0
0.8
57
11
0
1
57
12
0.066
0.066
89
13
0.175
0.175
72
14
0.284
0.284
61
15
0.392
0.392
55
16
0.5
0.5
53
*Tab of device attached to topside copper
DS010484-23
FIGURE 1. Cross-sectional view of Integrated Circuit
Mounted on a printed circuit board. Note that the case
temperature is measured at the point where the leads
contact with the mounting pad surface
DS010484-24
FIGURE 2. Power Dissipation Diagram
www.national.com
7


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