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BD3464FV-E2 Scheda tecnica(PDF) 11 Page - Rohm |
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BD3464FV-E2 Scheda tecnica(HTML) 11 Page - Rohm |
11 / 30 page BD3464FV 11/26 TSZ02201-0C2C0E100370-1-2 © 2015 ROHM Co., Ltd. All rights reserved. www.rohm.com TSZ22111・15・001 16.Dec.2015 rev.001 (2) I2C BUS FORMAT MSB LSB MSB LSB MSB LSB S Slave Address A Select Address A Data A P 1bit 8bit 1bit 8bit 1bit 8bit 1bit 1bit S = Start condition (Recognition of start bit) Slave Address = Recognition of slave address. The first 7 bits correspond to the slave address. The least significant bit is “L” which corresponds to write mode. A = ACKNOWLEDGE bit (Recognition of acknowledgement) Select Address = Select address corresponding to volume, bass or treble. Data = Data on every volume and tone. P = Stop condition (Recognition of stop bit) (3) I2C BUS Interface Protocol (a) Basic format S Slave Address A Select Address A Data A P MSB LSB MSB LSB MSB LSB (b) Automatic increment (Select Address increases (+1) according to the number of data. S Slave Address A Select Address A Data1 A Data2 A ・・・・ DataN A P MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB (Example) ①Data1 shall be set as data of address specified by Select Address. ②Data2 shall be set as data of address specified by Select Address +1. ③DataN shall be set as data of address specified by Select Address +N-1. (c) Configuration unavailable for transmission (In this case, only Select Address1 is set. S Slave Address A Select Address1 A Data A Select Address 2 A Data A P MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB (Note)If any data is transmitted as Select Address 2 next to data, it is recognized as data, not as Select Address 2. (4) Slave Address Because the slave address can be changed by the setting of CS, it is possible to use two chips at the same time on identical BUS. MSB LSB SEL Voltage Condition A6 A5 A4 A3 A2 A1 A0 R/W GND to 0.2 x VCC 1 0 0 0 0 0 0 0 0.8 x VCC to VCC 1 0 0 0 0 1 0 0 Establish the CS voltage to define the setting. 80H 84H |
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