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ISL22326WM Scheda tecnica(PDF) 2 Page - Intersil Corporation |
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ISL22326WM Scheda tecnica(HTML) 2 Page - Intersil Corporation |
2 / 3 page 2 FN6623.1 November 11, 2011 Block Diagram I2C INTERFACE VCC RH0 RH1 GND RL0 RL1 RW0 RW1 SCL SDA A0 A1 A2 WR1 WR0 SHDN POWER-UP INTERFACE, CONTROL AND STATUS LOGIC NON- VOLATILE REGISTERS Pin Descriptions TSSOP PIN SYMBOL DESCRIPTION 1VCC Power supply pin 2SHDN Shutdown active low input 3 RH0 “High” terminal of DCP0 4 RL0 “Low” terminal of DCP0 5 RW0 “Wiper” terminal of DCP0 6 A2 Device address input for the I2C interface 7 SCL Open drain I2C interface clock input 8 SDA Open drain Serial data I/O for the I2C interface 9 GND Device ground pin 10 RW1 “Wiper” terminal of DCP1 11 RL1 “Low” terminal of DCP1 12 RH1 “High” terminal of DCP1 13 A0 Device address input for the I2C interface 14 A1 Device address input for the I2C interface ISL22326WM |
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