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STP7NA40FI Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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STP7NA40FI Scheda tecnica(HTML) 1 Page - STMicroelectronics |
1 / 10 page STP7NA40 STP7NA40FI N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR s TYPICAL RDS(on) = 0.82 Ω s ± 30V GATE TO SOURCE VOLTAGE RATING s 100% AVALANCHE TESTED s REPETITIVE AVALANCHE DATA AT 100 oC s LOW INTRINSIC CAPACITANCES s GATE GHARGE MINIMIZED s REDUCED THRESHOLD VOLTAGE SPREAD DESCRIPTION This series of POWER MOSFETS represents the most advanced high voltage technology. The optimized cell layout coupled with a new proprietary edge termination concur to give the device low RDS(on) and gate charge, unequalled ruggedness and superior switching performance. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE INTERNAL SCHEMATIC DIAGRAM TYPE VDSS R DS(on) ID STP7NA40 STP7NA40FI 400 V 400 V <1 Ω <1 Ω 6.5 A 4.1 A 1 2 3 TO-220 ISOWATT220 November 1996 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Val ue Unit STP7NA40 STP7NA40FI VDS Drain-source Voltage (VGS =0) 400 V VDG R Drain-gate Volt age (RGS =20 k Ω)400 V VGS Gate-source Voltage ± 30 V ID Drain Current (cont inuous) at T c =25 oC6.5 4.1 A ID Drain Current (cont inuous) at T c =100 oC4.1 2.6 A IDM( •) Drain Current (pulsed) 26 26 A Ptot Total Dissipation at Tc =25 oC 100 40 W Derating Factor 0.8 0.32 W/ oC VISO I nsulat ion Withstand Voltage (DC) 2000 V Tstg St orage Temperat ure -65 to 150 oC Tj Max. Operat ing Junction Temperature 150 oC ( •) Pulse width limited by safe operating area 1 2 3 1/10 |
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