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Motore di ricerca datesheet componenti elettronici |
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LM2622 Scheda tecnica(PDF) 11 Page - National Semiconductor (TI) |
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LM2622 Scheda tecnica(HTML) 11 Page - National Semiconductor (TI) |
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11 / 16 page  Operation (Continued) The phase margin can also be improved by adding C C2 as discussed earlier in the section. The equation for A DC is given below with additional equations required for the calcu- lation: mc ) 0.072fs (in V/s) where R L is the minimum load resistance, VIN is the maxi- mum input voltage, g m is the error amplifier transconduc- tance found in the Electrical Characteristics table, and R D- SON is the value chosen from the graph ’R DSON vs. VIN ’in the Typical Performance Characteristics section. Layout Considerations The input bypass capacitor C IN, as shown in the typical operating circuit, must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with C IN, close to the V IN pin, to shunt any high frequency noise to ground. The output capacitor, C OUT, should also be placed close to the IC. Any copper trace connections for the C OUT capacitor can increase the series resistance, which directly effects output voltage ripple. The feedback network, resistors R FB1 and R FB2, should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can in- ject noise into the system. Trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching Power Supplies. www.national.com 11 |
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