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TC8020K6-G Scheda tecnica(PDF) 1 Page - Supertex, Inc

Il numero della parte TC8020K6-G
Spiegazioni elettronici  Six Pair, N- and P-Channel Enhancement-Mode MOSFET
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Produttore elettronici  SUTEX [Supertex, Inc]
Homepage  http://www.supertex.com
Logo SUTEX - Supertex, Inc

TC8020K6-G Scheda tecnica(HTML) 1 Page - Supertex, Inc

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Supertex inc.
Supertex inc.
www.supertex.com
TC8020
Doc.# DSFP-TC8020
C091112
Features
High voltage, vertical DMOS technology
Integrated gate-to-source resistor
Integrated gate-to-source Zener diode
Typical peak output +/-3.5A at 50V
Low threshold, low on-resistance
Low input & output capacitance
Fast switching speeds
Electrically isolated N- and P-MOSFET pairs
Applications
High voltage pulsers
Amplifiers
Buffers
Piezoelectric transducer drivers
General purpose line drivers
Logic level interfaces
Six Pair, N- and P-Channel
Enhancement-Mode MOSFET
General Description
The Supertex TC8020 consists of six pairs of high voltage,
low threshold N- and P-channel MOSFETs in a 56-lead QFN
package. All MOSFETs have integrated gate-to-source resistors
and gate-to-source Zener diode clamps which are desired for
high voltage pulser applications. The complimentary, high-speed,
high voltage, gate-clamped N- and P-channel MOSFET pairs
utilize an advanced vertical DMOS structure and Supertex’s well-
proven silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free from
thermal runaway and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input and output capacitance, and fast switching
speeds are desired.
Typical Application
10nF
10nF
10nF
10nF
10nF
10nF
10nF
10nF
TX(B)
TX(A)
TC8020
MD1715
AVDD
SELA
POSA
NEGA
POSB
NEGB
SELB
OP1A
ON1A
OP2A
ON2A
OP3A
ON3A
OP1B
ON2A
OP2B
ON2B
OP3B
ON3B
GP1
GN1
GP2
GN2
GP3
GN3
GP4
GN4
GP5
GN5
GP6
GN6
AGND
VLL/EN
+12V
GND AVSS
(SUB)
VSS
1.8 to 3.3V
CMOS
Input Logic
VDD1
VDD2
-12V
+12V
+12V
+3.3V
-12V
VPP2
SP2
VPP1
SP1
SP3
SP4
SP5
SP6
SN3
SN2
SN1
VNN1
VNN2
SN5
SN4
SN6
PAD
DP1
DN1
DP2
DN2
DP3
DN3
DP4
DN4
DP5
DN5
DP6
DN6


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