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BD3522EFV

© 2015 ROHM Co., Ltd. All rights reserved.

www.rohm.com

TSZ22111・15・001

TSZ02201-0J2J0A601000-1-2

02.Nov.2015 Rev.001

Pin Configuration

Pin Descriptions

Pin No.

Pin name

Pin Function

1

OUT

Output voltage pin

2

OUT

Output voltage pin

3

OUT

Output voltage pin

4

OUT

Output voltage pin

5

OUT

Output voltage pin

6

OUT

Output voltage pin

7

FB

Reference voltage feedback pin

8

NRCS

In-rush current protection (NRCS)

capacitor connection pin

9

GND

Ground pin

10

GND

Ground pin

11

VCC

Power supply pin

12

EN

Enable input pin

13

SCP

SCP delay time setting capacitor

connection pin

14

VD

IN input voltage detect pin

15

IN

Input voltage pin

16

IN

Input voltage pin

17

IN

Input voltage pin

18

IN

Input voltage pin

19

IN

Input voltage pin

20

IN

Input voltage pin

-

FIN

Connected to heatsink and GND

Description of Blocks

1.

AMP

This is an error amp that compares the reference voltage (0.65V) with FB voltage to drive the output N-Channel FET.

Frequency optimization aids in attaining rapid transient response, and to support the use of ceramic capacitors on the

output. AMP output voltage ranges from GND to VCC. When EN is OFF, or when UVLO is active, output goes LOW

and the output of the N-Channel FET switches OFF state.

2.

EN

The EN block controls the ON and OFF state of the regulator via the EN logic input pin. During OFF state, circuit

voltage stabilizes at 0

μA which minimizes the current consumption during standby mode. The FET is switched ON to

enable the discharge of the NRCS and OUT, thereby draining the excess charge and preventing the load side of an IC

from malfunctioning. Since there is no electrical connection required (e.g. between the VCC pin and the ESD

prevention diode), module operation is independent of the input sequence.

3.

VCCUVLO

To prevent malfunctions that can occur during a sudden decrease in VCC, the UVLO circuit switches the output to OFF

state, and (like the EN block) discharges NRCS and OUT. Once the UVLO threshold voltage (TYP3.80V) is reached,

the power-on reset is triggered and output is restored.

4.

VDUVLO

VD pin is the IN voltage detect pin. When VD voltage exceeds the threshold voltage, VDUVLO becomes active. Once

active, the status of output voltage remains ON even if VD voltage drops. (When IN voltage drops, SCP engages and

output switches OFF.) Unlike EN and VCC, it is active at output startup. VDUVLO can be restored either by

reconnecting the EN pin or VCC pin.

5.

CURRENT LIMIT

During ON state, the current limit function monitors the output current of the IC against the current limit value. When

the output current exceeds this value, this block lowers the output current to protect the load of the IC. When it

overcomes the overcurrent state, output voltage is restored to the normal value. However when the output voltage falls

below the SCP startup voltage, the SCP function becomes active and the output switches OFF.

20

19

18

17

16

15

14

13

12

11

1

OUT

FIN

2

OUT

3

OUT

4

OUT

5

OUT

6

OUT

7

FB

8

NRCS

9

GND

10

GND

IN

IN

IN

IN

IN

IN

SCP

EN

VCC

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