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MC100LVEL92DWG Scheda tecnica(PDF) 1 Page - ON Semiconductor

Il numero della parte MC100LVEL92DWG
Spiegazioni elettronici  5V Triple PECL Input to LVPECL Output Translator
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Produttore elettronici  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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MC100LVEL92DWG Scheda tecnica(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 13
1
Publication Order Number:
MC100LVEL92/D
MC100LVEL92
5V Triple PECL Input to
LVPECL Output Translator
Description
The MC100LVEL92 is a triple PECL input to LVPECL output
translator. The device receives standard PECL signals and translates
them to differential LVPECL output signals.
To accomplish the PECL to LVPECL level translation, the
MC100LVEL92 requires three power rails. The VCC supply is to be
connected to the standard 5 V PECL supply, the LVCC supply is to be
connected to the 3.3 V LVPECL supply, and Ground is connected to
the system ground plane. Both the VCC and LVCC should be bypassed
to ground with 0.01
mF capacitors.
The PECL VBB pin, an internally generated voltage supply, is
available to this device only. For single-ended input conditions, the
unused differential input is connected to VBB as a switching reference
voltage. VBB may also rebias AC coupled inputs. When used,
decouple VBB and VCC via a 0.01 mF capacitor and limit current
sourcing or sinking to 0.5 mA. When not used, VBB should be
left open.
Features
500 ps Propagation Delays
5 V and 3.3 V Supplies Required
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
The 100 Series Contains Temperature Compensation
LVPECL Operating Range: LVCC = 3.0 V to 3.8 V
PECL Operating Range: VCC = 4.5 V to 5.5 V
Internal Input Pulldown Resistors
Q Output will Default LOW with Inputs Open or < GND + 1.3 V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity: Level 3 (Pb−Free)
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index 28 to 34
Transistor Count = 247 devices
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
MARKING DIAGRAM*
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb-Free Package
SOIC−20 WB
DW SUFFIX
CASE 751D
20
1
100LVEL92
AWLYYWWG
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping
MC100LVEL92DWG
SOIC−20 WB
(Pb-Free)
38 Units/Tube
MC100LVEL92DWR2G SOIC−20 WB
(Pb-Free)
1000/Tape & Reel


Codice articolo simile - MC100LVEL92DWG

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
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ON Semiconductor
MC100LVEL92DWG ONSEMI-MC100LVEL92DWG Datasheet
112Kb / 6P
   5V Triple PECL Input to LVPECL Output Translator
November, 2006 ??Rev. 11
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