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MC100LVEL51DTR2G Scheda tecnica(PDF) 3 Page - ON Semiconductor

Il numero della parte MC100LVEL51DTR2G
Spiegazioni elettronici  3.3V ECL Differential Clock D Flip?륡lop
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Produttore elettronici  ONSEMI [ON Semiconductor]
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MC100LVEL51
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Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
8 to 0
V
VEE
NECL Mode Power Supply
VCC = 0 V
−8 to 0
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VI ≤ VCC
VI ≥ VEE
6 to 0
−6 to 0
V
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC−8 NB
190
130
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
SOIC−8 NB
41 to 44 ± 5%
°C/W
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP−8
185
140
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
TSSOP−8
41 to 44 ± 5%
°C/W
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
DFN−8
129
84
°C/W
Tsol
Wave Solder (Pb-Free)
< 2 to 3 sec @ 260°C
265
°C
qJC
Thermal Resistance (Junction-to-Case)
(Note 1)
DFN−8
35 to 40
°C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)


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Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
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ON Semiconductor
MC100LVEL51DTR2G ONSEMI-MC100LVEL51DTR2G Datasheet
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   3.3V ECL Differential Clock D Flip-Flop
December, 2006 ??Rev. 4
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