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MC100LVEL13 Scheda tecnica(PDF) 1 Page - ON Semiconductor |
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MC100LVEL13 Scheda tecnica(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. 7 1 Publication Order Number: MC100LVEL13/D MC100LVEL13 3.3 V ECL Dual 1:3 Fanout Buffer Description The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer. The Low Output-Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE, The D input will bias around VCC/2 and the Q output will go LOW. Features • 500 ps Typical Propagation Delays • 50 ps Output-Output Skews • ESD Protection: > 2 kV Human Body Model • The 100 Series Contains Temperature Compensation • PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −3.8 V • Internal Input Pulldown Resistors • Q Output will Default LOW with Inputs Open or at VEE • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test • Moisture Sensitivity: Level 3 (Pb-Free) • Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 • Transistor Count = 143 Devices • These Devices are Pb-Free, Halogen Free and are RoHS Compliant SOIC−20 WB DW SUFFIX CASE 751D www.onsemi.com *For additional marking information, refer to Application Note AND8002/D. MARKING DIAGRAM* A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb-Free Package 20 1 100LVEL13 AWLYYWWG Device Package Shipping† ORDERING INFORMATION MC100LVEL13DWG SOIC−20 WB (Pb-Free) 38 Units / Tube MC100LVEL13DWR2G 1000 Tape & Reel †For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SOIC−20 WB (Pb-Free) |
Codice articolo simile - MC100LVEL13_16 |
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Descrizione simile - MC100LVEL13_16 |
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