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MC10EP451 Scheda tecnica(PDF) 6 Page - ON Semiconductor |
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MC10EP451 Scheda tecnica(HTML) 6 Page - ON Semiconductor |
6 / 10 page MC10EP451, MC100EP451 http://onsemi.com 6 Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 13) Symbol Characteristic −40 °C 25 °C 85 °C Unit Min Typ Max Min Typ Max Min Typ Max IEE Power Supply Current 85 105 135 85 105 135 85 105 135 mA VOH Output HIGH Voltage (Note 14) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV VOL Output LOW Voltage (Note 14) −1995 −1820 −1695 −1995 −1820 −1695 −1995 −1820 −1695 mV VIH Input HIGH Voltage (Single−Ended) −1225 −880 −1225 −880 −1225 −880 mV VIL Input LOW Voltage (Single−Ended) −1995 −1625 −1995 −1625 −1995 −1625 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 15) VEE+2.0 0.0 VEE+2.0 0.0 VEE+2.0 0.0 V IIH Input HIGH Current 150 150 150 mA IIL Input LOW Current 0.5 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. Input and output parameters vary 1:1 with VCC. 14. All loading with 50 W to VCC − 2.0 V. 15. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 16) Symbol Characteristic −40 °C 25 °C 85 °C Unit Min Typ Max Min Typ Max Min Typ Max VOUTpp Output Voltage Amplitude @ 3 GHz (Figure 4) (Note 17) 540 670 520 650 450 580 mV tPLH, tPHL Propagation Delay to CLK to Q, Q Output Differential MR to Q, Q 330 430 430 530 530 630 350 450 450 550 550 650 390 490 490 590 590 690 ps tRR Reset Recovery MR to CLK 240 145 250 150 260 160 ps tS tH Setup Time D to CLK Hold Time CLK to D 80 80 40 40 80 80 40 40 80 80 40 40 ps tPW Minimum Pulse Rate MR 400 400 400 ps tSKEW Within−Device Skew (Note 18) Device−To−Device Skew (Note 19) 20 35 40 100 20 35 40 100 20 35 40 100 tJITTER CLOCK Random Jitter (RMS) @ v3.0 GHz (Figure 4) 0.2 1 0.2 1 0.2 1 ps tr tf Output Rise/Fall Times Q, Q (20% − 80%) 100 100 150 150 250 250 110 110 160 160 260 260 130 130 180 180 280 280 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 16. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. 17. VOL and VOH specifications not guaranteed for Fmax testing. 18. Skew is measured between outputs under identical transitions and conditions on any one device. 19. Device−To−Device skew for identical transitions at identical VCC levels. |
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