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MC100E101FNR2G Scheda tecnica(PDF) 2 Page - ON Semiconductor |
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MC100E101FNR2G Scheda tecnica(HTML) 2 Page - ON Semiconductor |
2 / 7 page MC10E101, MC100E101 www.onsemi.com 2 All VCC and VCCO pins are tied together on the die. VCCO D0a D0b D0c D0d D1a D1b 5 VCCO D2d D2c D2b VEE D2a D1d D1c 26 27 28 2 3 4 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 67 8 9 10 D3a D3b D3c D3d Q3 Q3 Q2 Q2 VCC Q1 Q1 Q0 Q0 1 Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. 28-Lead Pinout: Assignment (Top View) D0a D0b D0c D0d D1a D1b D1c D1d D2a D2b D2c D2d D3a D3b D3c D3d Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Figure 2. Logic Diagram Table 1. PIN DESCRIPTION Pin Function D0a − D3d ECL Data Inputs Q0 − Q3, Q0 − Q3 ECL Differential Outputs VCC, VCCO Positive Supply VEE Negative Supply Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Mode Power Supply VEE = 0 V 8 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V VI v VCC VI w VEE 6 −6 V Iout Output Current Continuous Surge 50 100 mA TA Operating Temperature Range 0 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm PLCC−28 63.5 43.5 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board PLCC−28 22 to 26 °C/W Tsol Wave Solder (Pb-Free) 265 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. |
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