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ST16C552 Scheda tecnica(PDF) 7 Page - Exar Corporation |
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ST16C552 Scheda tecnica(HTML) 7 Page - Exar Corporation |
7 / 39 page 7 ST16C552/552A Rev. 3.40 Symbol Pin Signal Type Pin Description effect on the transmit or receive operation. -DSR A/B 31,5 I Data Set Ready (active low) - These inputs are associated with individual UART channels, A through B. A logic 0 on this pin(s) indicates the modem or data set is powered-on and is ready for data exchange with the UART. This pin has no effect on the UART’s transmit or receive operation. -DTR A/B 25,11 O Data Terminal Ready (active low) - These outputs are associated with individual UART channels, A through B. A logic 0 on this pin(s) indicates that the 552/552A is powered- on and ready. This pin can be controlled via the modem control register for channel(s) A-B. Writing a logic 1 to MCR bit-0 will set the -DTR output to logic 0, enabling the modem. This pin will be a logic 1 after writing a logic 0 to MCR bit- 0, or after a reset. This pin has no effect on the UART’s transmit or receive operation. -RI A/B 30,6 I Ring Indicator (active low) - These inputs are associated with individual UART channels, A through B. A logic 0 on this pin(s) indicates the modem has received a ringing signal from the telephone line(s). A logic 1 transition on this input pin will generate an interrupt for the ringing channel(s). This pin does not have any effect on the transmit or receive operation. -RTS A/B 24,12 O Request to Send (active low) - These outputs are associated with individual UART channels, A through B. A logic 0 on the -RTS pin(s) indicates the transmitter has data ready and waiting to send for the given channel(s). Writing a logic 1 in the modem control register (MCR bit-1) will set this pin to a logic 0 indicating data is available. After a reset this pin will be set to a logic 1. This pin does not have any effect on the transmit or receive operation. RX A/B 41,62 I Receive Data Input, RX A-B. - These inputs are associated with individual serial channel(s) to the 552. The RX signal will be a logic 1 during reset, idle (no data), or when the transmitter is disabled. During the local loop-back mode, the RX input pins are disabled and TX data is internally connected to the SYMBOL DESCRIPTION |
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