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CS51031GD8G Scheda tecnica(PDF) 8 Page - ON Semiconductor |
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CS51031GD8G Scheda tecnica(HTML) 8 Page - ON Semiconductor |
8 / 10 page CS51031 http://onsemi.com 8 The fault time is the sum of the slow discharge time the fast discharge time and the recharge time. It is dominated by the slow discharge time. The first parameter is the slow discharge time, it is the time for the CS capacitor to discharge from 2.4 V to 1.5 V and is given by: tSlowDischarge(t) + CS (2.4 V * 1.5 V) IDischarge where IDischarge is 6.0 mA typical. tSlowDischarge(t) + CS 1.5 105 The fast discharge time occurs when a fault is first detected. The CS capacitor is discharged from 2.5 V to 2.4 V. tFastDischarge(t) + CS (2.5 V * 2.4 V) IFastDischarge where IFastDischarge is 66 mA typical. tFastDischarge(t) + CS 1515 The recharge time is the time for CS to charge from 1.5 V to 2.5 V. tCharge(t) + CS (2.5 V * 1.5 V) ICharge where ICharge is 264 mA typical. tCharge(t) + CS 3787 The fault time is given by: tFault + CS (3787 ) 1515 ) 1.5 105) tFault + CS (1.55 105) For this circuit tFault + 0.1 10*6 1.55 105 + 15.5 ms A larger value of CS will increase the fault time out time but will also increase the Soft−Start time. 9) Input Capacitor The input capacitor reduces the peak currents drawn from the input supply and reduces the noise and ripple voltage on the VCC and VC pins. This capacitor must also ensure that the VCC remains above the UVLO voltage in the event of an output short circuit. A low ESR capacitor of at least 100 mF is good. A ceramic surface mount capacitor should also be connected between VCC and ground to filter high frequency noise. 10) MOSFET Selection The CS51031 drives a P−Channel MOSFET. The VGATE pin swings from GND to VC. The type of P−Ch FET used depends on the operating conditions but for input voltages below 7.0 V a logic level FET should be used. A P−Ch FET with a continuous drain current (ID) rating greater than the maximum output current is required. The Gate−to−Source voltage VGS and the Drain−to Source Breakdown Voltage should be chosen based on the input supply voltage. The power dissipation due to the conduction losses is given by: PD + IOUT2 RDS(ON) D where RDS(ON) is the value at TJ + 100°C The power dissipation of the P−Ch FET due to the switching losses is given by: PD + 0.5 VIN IOUT (tr) fSW where tr = Rise Time. 11) Diode Selection The flyback or catch diode should be a Schottky diode because of it’s fast switching ability and low forward voltage drop. The current rating must be at least equal to the maximum output current. The breakdown voltage should be at least 20 V for this 12 V application. The diode power dissipation is given by: PD + IOUT VD (1.0 * D min) |
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