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TLP759IGM Scheda tecnica(PDF) 5 Page - Toshiba Semiconductor |
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TLP759IGM Scheda tecnica(HTML) 5 Page - Toshiba Semiconductor |
5 / 6 page TLP759(IGM) 2003-02-19 5 Test Circuit 2: Common Mode Noise Immunity Test Circuit s) ( f t 1200(V) L CM s) ( r t 1200(V) H CM m = , m = VO (IF = 0mA) VO Output monitor VO (IF = 10mA) tr VCM 15V 90% 1500V 0V tf 10% 4V 1V VOL VCM IF 1 2 3 4 8 7 6 5 VCC = 15 V RL Pulse generator ZO = 50Ω |
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