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Si5340-D-EVB Scheda tecnica(PDF) 6 Page - Silicon Laboratories |
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Si5340-D-EVB Scheda tecnica(HTML) 6 Page - Silicon Laboratories |
6 / 53 page 3.3.1 XA/XB Clock and Crystal Input An internal crystal oscillator exists between pin XA and XB. When this oscillator is enabled, an external crystal connected across these pins will oscillate and provide a clock input to the PLL. A crystal frequency of 25 MHz can be used although crystals in the frequency range of 48 MHz to 54 MHz are recommended for best jitter performance. Frequency offsets due to CL mismatch can be adjusted using the frequency adjustment feature which allows frequency adjustments of ± 1000 ppm. The Si5340/41 Family Reference Manual pro- vides additional information on PCB layout recommendations for the crystal to ensure optimum jitter performance. Refer to Table 5.12 Crystal Specifications on page 31 for crystal specifications. To achieve optimal jitter performance and minimize BOM cost, a crystal is recommended on the XA/XB reference input. A clock (e.g., XO) may be used in lieu of the crystal, but it will result in higher output jitter. See the Si5340/41 Reference Manual for more information. Selection between the external XTAL or input clock is controlled by register configuration. The internal crystal load capacitors (CL) are disabled in the input clock mode. Refer to Table 5.3 Input Clock Specifications on page 20 for the input clock requirements at XAXB. Both a single-ended or a differential input clock can be connected to the XA/XB pins as shown in the figure below. A PXAXB divider is available to accommodate external clock frequencies higher than 54 MHz. Differential Connection 2xCL 2xCL XB XA 2xCL 2xCL XB XA Single- ended XO Connection Crystal Connection OSC XB XA XTAL 2xCL 2xCL Si5341/40 Si5341/40 Si5341/40 Note:2. 0 Vpp_ se max XO with Clipped Sine Wave Output 2xCL 2xCL XB XA OSC Si5341/40 Note:2. 0 Vpp_ se max CMOS Output R2 R1 XO VDD R1 R2 3. 3V 523 ohms442 ohms 2. 5V 475ohms 649 ohms 1. 8V 158ohms 866 ohms 0. 1 uf 0. 1uf 0. 1uf 0. 1uf 0. 1uf 0. 1 uf 0. 1 uf Single-ended Connection Note:2. 5 Vpp diff max X1 X2 nc nc X1 X2 nc nc X1 X2 nc nc X2 X1 OSC OSC Figure 3.2. XAXB External Crystal and Clock Connections Si5341/40 Rev D Data Sheet Functional Description silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 5 |
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