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TMS3705

SCBS881C – JANUARY 2010 – REVISED APRIL 2016

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Specifications

Copyright © 2010–2016, Texas Instruments Incorporated

Electrical Characteristics (continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Phase-Locked Loop (D_TST)

PLL frequency

15.984

16 16.0166

MHz

Jitter of the PLL frequency

6%

Power-On Reset (POR)

POR threshold voltage, rising

1.9

3.5

V

POR threshold voltage, falling

1.3

2.6

V

(1)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

4.5

Thermal Resistance Characteristics for D (SOIC) Package

PARAMETER

VALUE

UNIT

130

°C/W

4.6

Switching Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Time for TXCT high to initialize a new

transmission

From start of the oscillator after power on

or waking up until reaching the Idle state

(see Figure 4-1, Figure 4-2, Figure 4-3)

2

2.05

2.2

ms

Delay between leaving Idle state and start of

diagnosis byte at SCIO

Normal operation (see Figure 4-1,

Figure 4-2, Figure 4-3)

2

2.12

2.2

ms

Delay between end of charge or end of

program and start of transponder data transmit

on SCIO

See Figure 4-1, Figure 4-2, Figure 4-3.

3

ms

Write pulse pause

See Figure 4-5.

0.1

ms

Signal delay on TXCT for controlling the full

bridge

Write mode

73

79

85

µs

NRZ bit duration for mode control register

See Figure 4-4.

121

128

135

µs

NRZ bit duration on SCIO

Asynchronous mode (see Figure 4-6)

63

64

65

µs

Low signal delay on TXCT to stop

Synchronous mode

128

800

µs

Total TXCT time for reading data on SCIO

Synchronous mode (see Figure 4-7)

900

µs

TXCT period for shifting data on SCIO

Synchronous mode (seeFigure 4-7)

4

64

100

µs

Low phase on TXCT

Synchronous mode (see Figure 4-7)

2

32

µs

Data ready for output after SCIO goes high

Synchronous mode (see Figure 4-7)

1

127

µs