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FDS6993 Scheda tecnica(PDF) 3 Page - Fairchild Semiconductor |
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FDS6993 Scheda tecnica(HTML) 3 Page - Fairchild Semiconductor |
3 / 8 page FDS6993 Rev C (W) Electrical Characteristics (continued) T A = 25°C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Switching Characteristics (Note 2) td(on) Turn-On Delay Time Q1 Q2 10 19 19 34 ns tr Turn-On Rise Time Q1 Q2 14 20 26 35 ns td(off) Turn-Off Delay Time Q1 Q2 14 134 24 215 ns tf Turn-Off Fall Time Q1 VDD = –15 V, ID = –1 A, VGS = –10V, RGEN = 6 Ω Q2 VDD = –6 V, ID = –1 A, VGS = –4.5V, RGEN = 6 Ω Q1 Q2 9 121 18 193 ns Qg Total Gate Charge Q1 Q2 5.5 32 7.7 45 nC Qgs Gate-Source Charge Q1 Q2 1.8 4.0 nC Qgd Gate-Drain Charge Q1 VDS = –15 V, ID = –4.3 A, VGS = –5 V Q2 VDS = –6 V, ID = –6.8 A, VGS = –5 V Q1 Q2 2.2 8.0 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current Q1 Q2 –1.3 –1.3 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = –1.3 A (Note 2) VGS = 0 V, IS = –1.3 A (Note 2) Q1 Q2 –0.8 –0.6 –1.2 –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°/W when mounted on a 0.5 in 2 pad of 2 oz copper b) 125°/W when mounted on a .02 in 2 pad of 2 oz copper c) 135°/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% |
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