SN74HC573AQ1

OCTAL TRANSPARENT DTYPE LATCH

WITH 3STATE OUTPUTS

SCLS600A − NOVEMBER 2004 − REVISED APRIL 2008

1

POST OFFICE BOX 655303

Lines Directly or up to 15 LSTTL Loads

description/ordering information

This octal transparent D-type latch features 3-state outputs designed specifically for driving highly capacitive

or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the

outputs are latched to retain the data that was set up.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without interface or pullup components.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40

°C to 125°C

SOIC − DW

Reel of 2500

SN74HC573AQDWRQ1

HC573AQ

−40

°C to 125°C

TSSOP − PW

Reel of 2000

SN74HC573AQPWRQ1

HC573AQ

† For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI web site at http://www.ti.com.

‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DW OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OE

1D

2D

3D

4D

5D

6D

7D

8D

GND

1Q

2Q

3Q

4Q

5Q

6Q

7Q

8Q

LE

Copyright

 2008, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.