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SN74ALVCH162820 Scheda tecnica(PDF) 2 Page - Texas Instruments |
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SN74ALVCH162820 Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 13 page www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) C1 1D 1 28 56 55 2 3 To Nine Other Channels 1OE 2OE CLK D1 1Q1 1Q2 ABSOLUTE MAXIMUM RATINGS (1) SN74ALVCH162820 3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS SCES012H – JULY 1995 – REVISED SEPTEMBER 2004 FUNCTION TABLE (each flip-flop) INPUTS OUTPUT Q OEn(1) CLK D L ↑ H H L ↑ L L L L X Q0 H X X Z (1) n = 1, 2 over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range -0.5 4.6 V VI Input voltage range(2) -0.5 4.6 V VO Output voltage range(2)(3) -0.5 VCC + 0.5 V IIK Input clamp current VI < 0 -50 mA IOK Output clamp current VO < 0 -50 mA IO Continuous output current ±50 mA Continuous current through each VCC or GND ±100 mA DGG package 64 θ JA Package thermal impedance(4) °C/W DL package 56 Tstg Storage temperature range -65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) This value is limited to 4.6 V maximum. (4) The package thermal impedance is calculated in accordance with JESD 51. 2 |
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