OE

V

GND

Regulated 3.3 V

CC

µC or

System Logic

µC

System Logic

LEDs

5 V

A1

A4

Y1

Y4

SN74AHCT367

www.ti.com

SCLS418H – JUNE 1998 – REVISED DECEMBER 2014

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

10.1 Application Information

SN74AHCT367 is a low-drive CMOS device that can be used for a multitude of bus interface type applications

where output ringing is a concern. The low drive and slow edge rates will minimize overshoot and undershoot on

This feature makes it Ideal for translating up from 3.3 V to 5 V. Figure 5 shows this type of translation.

10.2 Typical Application

Figure 4. Typical Application Schematic

10.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus

contention because it can drive currents that would exceed maximum limits. The high drive will also create fast

edges into light loads, so routing and load conditions should be considered to prevent ringing.

10.2.2 Detailed Design Procedure

1. Recommended Input Conditions

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For rise time and fall time specifications, see

Δt/ΔV in the Recommended Operating Conditions table.

–

–

2. Recommend Output Conditions

–

Load currents should not exceed 25 mA per output and 75 mA total for the part.

–

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