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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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LM3450 Scheda tecnica(PDF) 2 Page - Texas Instruments |
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LM3450 Scheda tecnica(HTML) 2 Page - Texas Instruments |
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2 / 40 page  VCC VREF ZCD FLT2 DIM GATE VAC CS COMP GND FB ISEN HOLD VADJ FLT1 BIAS 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 LM3450 SNVS681D – NOVEMBER 2010 – REVISED MAY 2013 www.ti.com Connection Diagram Top View Figure 1. 16-Lead TSSOP Package Number PW PIN DESCRIPTIONS Pin Name Description Application Information Reference Output: Connect directly to VADJ or to resistor divider feeding VADJ 1 VREF 3V Reference and to necessary external circuits. Analog Dim and Phase Dimming Range Input: Connect directly to VREF to force standard 70% phase dimming range. Connect to resistor divider from VREF to 2 VADJ Analog Adjust extend usable range of some phase dimmers or for analog dimming. Connect to GND for low power mode. Ramp Comparator Input: Connect a series resistor from FLT1 capacitor and a 3 FLT2 Filter 2 capacitor to GND to establish second filter pole. Angle Decoder Output: Connect a series resistor to a capacitor to GND to 4 FLT1 Filter 1 establish first filter pole. Open Drain PWM Dim Output: Connect to dimming input of output stage LED 5 DIM 500 Hz PWM Output driver (directly or with isolation) to provide decoded dimming command. Multiplier and Angle Decoder Input: Connect to resistor divider from rectified AC 6 VAC Sampled Rectified Line line. Error Amplifier Output and PWM Comparator Input: Connect a capacitor to GND 7 COMP Compensation to set the compensation. Error Amplifier Inverting Input: Connect to output voltage via resistor divider to control PFC voltage loop for non-isolated designs. Connect a 5.11k Ω resistor to 8 FB Feedback GND for isolated designs (bypasses error amplifier). Also includes over-voltage protection and shutdown modes. Input Current Sense Non-Inverting Input: Connect to diode bridge return and 9 ISEN Input Current Sense resistor to GND to sense input current for dynamic hold. Connect a 0.1µF capacitor and Schottky diode to GND, and a 0.22µF capacitor to HOLD. 10 GND Power Ground System Ground MosFET Current Sense Input: Connect to positive terminal of sense resistor in 11 CS Current Sense PFC MosFET source. 12 GATE Gate Drive Gate Drive Output: Connect to gate of main power MosFET for PFC. Power Supply Input: Connect to primary bias supply. Connect a 0.1µF bypass 13 VCC Input Supply capacitor to ground. Demagnetization Sense Input: Connect a 100k Ω resistor to transformer/inductor 14 ZCD Zero Crossing Detector winding to detect when all energy has been transferred. Open Drain Dynamic Hold Input: Connect to holding resistor which is connected 15 HOLD Dynamic Hold to source of passFET. Pre-regulator Gate Bias Output: Connect to gate of passFET and through 16 BIAS Pre-regulator Gate Bias resistor to rectified AC (drain of passFET) to aid with startup. 2 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM3450 |
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