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LM2750 Scheda tecnica(PDF) 6 Page - Texas Instruments |
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LM2750 Scheda tecnica(HTML) 6 Page - Texas Instruments |
6 / 29 page 6 LM2750, LM2750-ADJ SNVS180N – APRIL 2002 – REVISED APRIL 2016 www.ti.com Product Folder Links: LM2750 LM2750-ADJ Submit Documentation Feedback Copyright © 2002–2016, Texas Instruments Incorporated Electrical Characteristics (continued) Typical values apply for TJ = 25°C; minimum and maximum limits apply over the operating junction temperature range; 2.9 V ≤ VIN ≤ 5.6 V, VOUT = 5 V (LM2750-ADJ), V(SD) = VIN, CFLY = 1 µF, CIN = 2 × 1 µF, COUT = 2 × 1 µF, unless otherwise specified (1)(2)(3). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (5) SD Input Current (IIH ) is due to a 200-kΩ (typical) pulldown resistor connected internally between the SD pin and GND. (6) Limit is the minimum required output capacitance to ensure proper operation. This electrical specification is specified by design. SHUTDOWN PIN (SD) CHARACTERISTICS VIH Logic-high SD input 1.3 VIN V VIL Logic-low SD input 0 0.4 V IIH SD input current(5) 1.3 V ≤ V(SD) ≤ VIN 15 50 µA IIL SD input current V(SD) = 0 V –1 1 µA CAPACITOR CHARACTERISTICS CIN Required input capacitance(6) IOUT ≤ 60 mA 1 µF 60 mA ≤ IOUT ≤ 120 mA 2 COUT Required output capacitance(6) IOUT ≤ 60 mA 1 µF 60 mA ≤ IOUT ≤ 120 mA 2 (1) Turnon time is measured from when SD signal is pulled high until the output voltage crosses 90% of its final value. 6.6 Switching Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tON VOUT turnon time VIN = 3 V, IOUT = 100 mA (1) 0.5 ms |
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