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CDC5806 Scheda tecnica(PDF) 6 Page - Texas Instruments |
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CDC5806 Scheda tecnica(HTML) 6 Page - Texas Instruments |
6 / 13 page www.ti.com From Output of DUT R = 1 k Ω R = 1 k Ω VDD CL = 10 pF Time/ms fAUDCLK /MHz tL Lock-Up Time VDD /V VPUC Time/ms Time/ms Time/ms fREF_IN /MHz AUDSEL /V f = 54 MHz tL(ω) Lock Time ftarget < 1% ftarget < 1% CDC5806 SCAS760A – MARCH 2004 – REVISED JULY 2004 Figure 1. LVCMOS Output Test Load Figure 2. Timing Diagram of PLL Lock Time of Audio Clock 6 |
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