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DAC7545JU Scheda tecnica(PDF) 3 Page - Texas Instruments

Il numero della parte DAC7545JU
Spiegazioni elettronici  CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTER Microprocessor Compatible
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo TI1 - Texas Instruments

DAC7545JU Scheda tecnica(HTML) 3 Page - Texas Instruments

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DAC7545
3
SBAS150A
www.ti.com
ELECTRICAL CHARACTERISTICS
VREF = +10V, VOUT 1 = 0V, and ACOM = DCOM, unless otherwise specified.
NOTES: (1) Temperature ranges—J, K, L, and GL: –40
°C to +85°C. (2) This includes the effect of 5ppm max, gain TC. (3) Ensured but not tested. (4) DB
0-DB11 = 0V
to VDD or VDD to 0V. (5) Typical. (6) Minimum. (7) Logic inputs are MOS gates. Typical input current (+25°C) is less than 1nA. (8) Sample tested at +25°C to ensure
compliance.
DAC7545
VDD = +5V
VDD = +15V
PARAMETER
GRADE
TA = +25°CTMAX-TMIN(1)
TA = +25°CTMAX-TMIN(1)
UNITS
TEST CONDITIONS/COMMENTS
STATIC PERFORMANCE
Resolution
All
12
12
12
12
Bits
Accuracy
J
±2
±2
±2
±2LSB
K
±1
±1
±1
±1LSB
L
±1/2
±1/2
±1/2
±1/2
LSB
GL
±1/2
±1/2
±1/2
±1/2
LSB
Differential Nonlinearity
J
±4
±4
±4
±4
LSB
10-Bit Monotonic, TMIN to TMAX
K
±1
±1
±1
±1
LSB
10-Bit Monotonic, TMIN to TMAX
L
±1
±1
±1
±1
LSB
12-Bit Monotonic, TMIN to TMAX
GL
±1
±1
±1
±1
LSB
12-Bit Monotonic, TMIN to TMAX
Gain Error (with internal RFB)(2)
J
±20
±20
±25
±25
LSB
DAC register loaded with FFFH.
K
±10
±10
±15
±15
LSB
Gain error is adjustable using
L
±5
±6
±10
±10
LSB
the circuits in Figures 2 and 3.
GL
±2
±3
±6
±7LSB
Gain Temperature Coefficient(3)
(
∆Gain/∆Temperature)
All
±5
±5
±10
±10
ppm/
°C Typical Value is 2ppm/°C
for VDD = +5
DC Supply Rejection(3)
(
∆Gain/∆V
DD)
All
0.015
0.03
0.01
0.02
%/%
∆V
DD ± 5%
Output Leakage Current at Out 1
J, K, L, GL
10
50
10
50
nA
DB0-DB11 = 0V; WR, CS = 0V
DYNAMIC PERFORMANCE
Current Settling Time(3)
All
2
2
2
2
µs
To 1/2 LSB. Out 1 Load = 100
DAC output measured from
falling edge of WR. CS = 0V.
Propagation Delay(3) (from digital input
All
change to 90% of final analog output)
300
250
ns
Out 1 Load = 100
Ω. C
EXT = 13pF
(4)
Glitch Energy
All
400
250
nV-s(5)
VREF = ACOM
AC Feedback at IOUT 1
All
5
5
5
5
mVp-p(5) VREF = ±10V, 10kHz Sine Wave
REFERENCE INPUT
Input Resistance (pin 19 to AGND)
All
7
7
7
7
k
(6)
Input Resistance TC = 300ppm/
°C(5)
25
25
25
25
k
AC OUTPUTS
Output Capacitance(3): COUT 1
All
70
70
70
70
pF
DB0-DB11 = 0V; WR, CS = 0V
COUT 2
All
200
200
200
200
pF
DB0-DB11 = VDD; WR, CS = 0V
DIGITAL INPUTS
VIH (Input HIGH Voltage)
All
2.4
2.4
13.5
13.5
V(6)
VIL (Input LOW Voltage)
All
0.8
0.8
1.5
1.5
V
IIN (Input Current)(7)
All
±1
±10
±1
±10
µAV
IN = 0V or VDD
Input Capacitance(3): DB0-DB11
All
5
5
5
5
pF
VIN = 0V
WR, CS
All
20
20
20
20
pF
VIN = 0V
SWITCHING CHARACTERISTICS(8)
Chip Select to Write Setup Time, tCS
All
280
380
180
200
ns(6)
See Timing Diagram
200
270
120
150
ns(5)
Chip Select to Write Hold Time, tCH
All
0
0
0
0
ns(6)
Write Pulse Width, tWR
All
250
400
160
240
ns(6)
tCS ≥ tWR, tCH ≥ 0
175
280
100
170
ns(5)
Data Setup Time, tDS
All
140
210
90
120
ns(6)
100
150
60
80
ns(5)
Data Hold Time, tDH
All
10
10
10
10
ns(6)
POWER SUPPLY, IDD
All
2
2
2
2
mA
All Digital Inputs VIL or VIH
All
100
500
100
500
µA
All Digital Inputs 0V or VDD
All
10
10
10
10
µA(5)
All Digital Inputs 0V or VDD


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